Silicon Labs /SiM3_NRND /SIM3L166_C /FLASHCTRL_0 /CONFIG

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Interpret as CONFIG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MODE0)SPMD 0 (DISABLED)RDSEN 0 (DISABLED)DPFEN 0 (INACTIVE)PFINH 0 (DISABLED)SQWEN 0 (DISABLED)ERASEEN 0 (EMPTY)BUFSTS 0 (NOT_SET)BUSYF

SQWEN=DISABLED, BUSYF=NOT_SET, BUFSTS=EMPTY, ERASEEN=DISABLED, RDSEN=DISABLED, SPMD=MODE0, DPFEN=DISABLED, PFINH=INACTIVE

Description

Controller Configuration

Fields

SPMD

Flash Speed Mode.

0 (MODE0): Read and write the flash at speed mode 0.

1 (MODE1): Read and write the flash at speed mode 1.

2 (MODE2): Read and write the flash at speed mode 2.

3 (MODE3): Read and write the flash at speed mode 3.

RDSEN

Read Store Mode Enable.

0 (DISABLED): Disable read store mode.

1 (ENABLED): Enable read store mode.

DPFEN

Data Prefetch Enable.

0 (DISABLED): Data accesses are excluded from the prefetch buffer.

1 (ENABLED): Data accesses are included in the prefetch buffer.

PFINH

Prefetch Inhibit.

0 (INACTIVE): Any reads from flash are prefetched until the prefetch buffer is full.

1 (ACTIVE): Inhibit the prefetch engine.

SQWEN

Flash Write Sequence Enable.

0 (DISABLED): Disable sequential write mode.

1 (ENABLED): Enable sequential write mode.

ERASEEN

Flash Page Erase Enable.

0 (DISABLED): Writes to the WRDATA field will initiate a write to flash at the address in the WRADDR field.

1 (ENABLED): Writes to the WRDATA field will initiate an erase of the flash page containing the address in the WRADDR field.

BUFSTS

Flash Buffer Status.

0 (EMPTY): The flash controller write data buffer is empty.

1 (FULL): The flash controller write data buffer is full.

BUSYF

Flash Operation Busy Flag.

0 (NOT_SET): The flash interface is not busy.

1 (SET): The flash interface is busy with an operation.

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